1. Field of the Invention
The present invention generally relates to interlayer-insulating technology for semiconductor integrated circuits, and particularly relates to so-called flowable CVD methods for filling patterned recesses with an interlayer-insulating film where the distance between wiring lines is narrow.
2. Description of the Related Art
In recent years, semiconductor devices have made impressive progress and achieved high integration, high speed, and high capacity, which allow for micro-fabrication of wiring. As micro-fabrication of wiring progresses, signal delay and increase of power consumption becomes problematic due to the increase of line capacity of wiring in the multilayer wiring structure. To solve this problem and to reduce the line capacity of wiring, so-called low-k film whose dielectric constant is low has been developed as an insulation film between wires, in addition, as a wiring material, copper is mainly used fin the purpose of reducing resistivity of the wiring material itself and improving signal delay. A well-known method for forming multilayer wiring using a low-k film and copper is a damascene method.
In the damascene method, multilayer wiring is completed by first forming a low-k film, then forming grooves (trenches) or connecting holes (via holes) by lithographic exposure and etching, and finally embedding copper therein. This damascene method has been playing a leading role in the field of film multilayer wiring technology. However, if micro-fabrication of wiring continues, copper used as a wiring material will increase its resistivity due to the width of wiring being too narrow, and as a result, copper loses its advantage. Since copper diffuses easily in a low-k film, if it is used as wiring material, it is required that additional complicated steps such as those for stopping the diffusion be taken. Thus, in place of copper, tungsten starts to re-garner attention, which has been used as a metal material since early times, because tungsten does not require complicated steps, and therefore it is possible to simplify the wiring steps and reduce the manufacturing cost.
By using tungsten as a wiring material, because it is relatively easier to etch as compared with copper, a metal wiring can first be formed without using a damascene method, and an interlayer insulating film can then be formed between the formed metal wirings. However, with conventional CVD methods, as the space between wires is extremely narrow, the space is difficult to be filled with a low-k film, and voids and the like are formed in the low-k film. Therefore, to solve this problem, a flowable CVD method has been developed.
In real device-wiring, there are some places where wiring intervals are wide and some other places where wiring intervals are narrow, and also places where both are mixed. Because of this unevenness, there is a challenge in filling all places until all grooves are filled so as to provide a flat surface by a flowable CVD method. Filling can be achieved by simply depositing a thick film according to the height from the top of the wiring, but if it is too thick, etching is required to etch unnecessary or excess film to flatten the surface of the deposited film. Also, if the film is too thick, a problem such as film-cracking occurs.
Conventionally, to improve filling properties, a method using a catalyst is known, as reported in, e.g., U.S. Pat. No. 8,187,951 and U.S. Pat. No. 7,629,227. However, with this method, a catalyst itself cannot evaporate and is left in a material, and therefore, this flowable CVD film-forming method does not significantly improve the filling properties. In addition, a method of causing an insulation film-forming material, alcohol, water, and the like to flow simultaneously during the film-forming process is known, as reported in, e.g., U.S. Pat. No. 7,915,139, U.S. Pat. No. 7,582,555, U.S. Pat. No. 7,888,233. However, with this method, there are problems such as generation of voids formed in the film after the film-forming process, and an extremely large amount of silanol contained in the material causing corrosion of metal and causing imperfect wiring.
As a general pre-treatment, a plasma treatment using a plasma of an inactive gas such as He and Ar, and a reduction treatment using a hydrogen plasma are known, but those methods have not improved the flatness of the film surfaces.
In the above and elsewhere in this disclosure, any discussion of problems and solutions involved in the related art has been included in this disclosure solely for the purposes of providing a context for the present invention, and should not be taken as an admission that any or all of the discussion were known at the time the invention was made.